Nano and Giga Challenges in Electronics and Photonics From Atoms to Materials to Devices to System Architecture Symposium and Spring School (Tutorial Lectures) Phoenix, Arizona, March 12-16, 2007 |
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Commentary
Silicon microelectronics, arguably the most successful technology developed by the mankind, sustained its exponential (Moore's Law) progress for 4 decades. However, now scientists and engineers agree that this progress will run into what is called the red brick wall of technical and economical limitations some time during the next decade. Optimists believe this big bang may be deferred until the so-called 22-nm ITRS node, to be reached by Year 2016 or so, while the pessimists like myself do not see any realistic way for the technology to go beyond the 45-nm node, to be reached by 2010 or maybe even a year or two earlier. The negative impact of running into the wall for the US high-tech economy can be hardly exaggerated. Sure, even after the next decade there will be more and more silicon chips fabricated each year. However, this manufacturing, as in all mature industries, will most probably move to countries with cheaper labor. The American electronics giants, which currently live on innovation, will face a survival challenge. This is why the extension of Moore's Law to the sub-10-nm range is such a vital task. As usual, there are both good and bad news from the current battle on this nanoelectronic frontier. On the positive side, both the federal government and electronic industry captains now recognize the necessity and urgency of research in this direction. On the negative side, the efficiency of those efforts is questionable. Large electronic companies, being extremely good at moving up an evolutionary path such as semiconductor microelectronics have serious problems with adapting revolutionary (disruptive) technologies like nanoelectronics. As a result, the substantial resources thrown onto the problem by the companies, some states, and federal government (within the $1B-scale National Nanotechnology Initiative) are not, in my humble opinion, being spent efficiently. Most money goes into studying various nanoscale objects (carbon nanotubes, semiconductor nanowires, DNA molecules, you name it) with little or no attempt to understand how these components might be incorporated into an integrated circuit, and what would they do there. It comes without saying that without such conceptual development, the vital questions about the possible fabrication cost and performance of nanoelectronic circuits may not be even asked, leave alone answered. Fortunately, the past year evidenced the emergence of such system approach to nanoelectronics by a few (for now, just few) academic and industrial groups. In particular, several groups, including our Stony Brook team, are developing hybrid semiconductor/nanodevice circuits which allow the established semiconductor electronic technology to be used to a full extent by augmenting it with an additional layer of simple nanodevices. Preliminary estimates show that such approach may be extremely fruitful, resulting in a dramatic (100-fold increase) of the circuit density. However, other approaches to nanoelectronics may challenge our hybrid circuit paradigm. This is why it is the right time to provide a good forum for nanoelectronics researchers to discuss the situation in detail. I hope such a forum will be provided by the Nanoelectronic Circuit Architecture session of the forthcoming meeting Nano and Giga Challenges in Electronics and Photonics, to be held in Phoenix, AZ (March 12-16, 2007). I am organizing this session together with Prof. Wolfgang Porod of Notre Dame University. We plan to have mostly invited talks from all major groups which carry out the conceptual development of nanoelectronics, with a lot of time for questions and detailed discussions. My positive experience of participation in the previous Nano-Giga meetings (in 2002 and 2004) gives me hope that in Arizona we may be able achieve a preliminary consensus on which road to follow, which would be a really turning point in the development of nanoelectronics, just in time to start an active practical work towards preempting the Moore's Law doom. |